650x Resource Thread

In researching a few topics for upcoming classes I’ve came across a few resources that our members may find of use.

If there’s anything that was missed, please post it in the towel section below.

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Books, books and more books… https://archive.org/details/commodore_c64_books

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6502.org has plenty of useful links as well as discussion forums.

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Now that is the mother load!! @.@

Because CPLD and FPGAs are king in my book:

6502 CPU in a CPLD

Tiny CPU is a custom “small CPU” design intended for implementation in a CPLD. Such soft CPU cores typically target an FPGA or large CPLD, but the target device for Tiny CPU is a small Altera CPLD with limited logic resources. This constrains the CPU to a minimal set of features in order to fit. It is an 8-bit CPU with only two registers, and a 10-bit address space. The instruction set is a subset of the 6502 instruction set, with modifications to reflect the smaller address space and number of registers.

I love the write up on OS/A65 the multitasking os for 6502 boards.

Personally, it would be amazing if someone implemented a rudimentary bsd socket stack and/or APE(Ansi/Posix Env) on top of OS/A65.

Lunix and ConTiki support TCP/IP, if I remember correctly. I think ConTiki has since been ported to some more modern, possibly commercial, platforms.

Also, not multitasking and not *Nix-y, but pretty cool, DOS/65 is a full featured portable CP/M workalike for the 6502, including BASIC interpreter and assembly development environment.

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This one, http://www.z80.eu/dos65.html?

That’s it. It was ported to a number of 6502 systems, from S100-baseed boards to C64, OSI C1P, AIM-65, and even the KIM-1, but with user-supplied drivers, can be ported to almost any 6502 system with moderate RAM and a disk.

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MOnSter 6502. Should we build one?
http://monster6502.com/

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We should and we should use it to build something cool like an old computer that uses it as the CPU.

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I was amazed at the MOnSter 6502 until I read 60 kHz. Maybe build something like a KIM-1 around it? A keypad and an LED display is not very demanding on the processor.

A benefit of 60 kHz operation is that an 8-bit timing loop can be much longer :slight_smile:

Yeah, you’d have a hard time syncing it with any video subsystem unless you treat it as a terminal connection.

Perhaps an update SWTPC 6800 system? :slight_smile:

With any system other than the truly prehistoric, support chips have a minimum of 100 kHz frequency. So the PIA in the SWTPc will have to be driven with a separate, faster clock. The standard serial port in most 6800 units was actually build using a bit-banged PIA instead of the then much more costly ACIA, so the serial I/O routines in the MIKBUG or SWTBUG monitor ROMs need special consideration.

I have spoken too soon about the KIM-1; the RIOTs or relatives it used also have minimum frequencies.

60 kHz? Ack! Thppppt!

That depends on if you have the MP-C or MP-S. The MP-C used MIKBUG and a 6820 while the MP-S used SWTBUG and a 6850.

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The MP-S was somewhat rare and the MP-A2 with SWTBUG even rarer. Some people modified their MP-A to run SWTBUG. MP-Cs were seemingly a dime a dozen.

Forget a disk drive. Many of those systems had to resort to rather tricky driver coding to keep up with the relatively slow single density bit rate. Some were able to read and write but were unable to feed the track layout to the FDC quickly enough to format their own diskettes.

Higher-frequency transistors might be the key to fixing this. They might be using the 2N7001/BS170, which are a bit long in the tooth and have significant gate charge. This means it takes longer to discharge that gate (to stop source-to-drain current) than something more modern.

A quick search turned up the ON Semi FDZ3N513ZT with a minuscule 1.0 nC @ 4.5v

I would guess that 3 MHz would be achievable with the right device.

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well I have bought a few 6502 and RAM chips and been working on a design that can bank switch 1Mb RAM.

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Let’s keep in touch so that we build compatible systems.

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